; Z80 instruction set
;
; Hard coded substitutions:
; n	=1-byte 8-bit integer immediate value
; nn	=2-byte 16-bit integer immediate value
; rel	=1-byte 2's complement displacement
; d	=1-byte 8-bit integer displacement
;
; Substitutions
-r0		=B,C,D,E,H,L,A			=00,01,02,03,04,05,07
-r3		=B,C,D,E,H,L,A			=00,08,10,18,20,28,38
-j3		=NZ,Z,NC,C			=00,08,10,18
-c3		=NZ,Z,NC,C,PO,PE,P,M		=00,08,10,18,20,28,30,38
-b3		=0,1,2,3,4,5,6,7		=00,08,10,18,20,28,30,38
-s3		=0,8,10,18,20,28,30,38		=00,08,10,18,20,28,30,38
-ir		=IX,IY				=DD,FD
-dd4		=BC,DE,HL,SP			=00,10,20,30
-qq4		=BC,DE,HL,AF			=00,10,20,30
-pp4		=BC,DE,IX,SP			=00,10,20,30
-rr4		=BC,DE,IY,SP			=00,10,20,30
;
; Instructions
;
; 8-bit load group
LD A,(BC)	=0A
LD A,(DE)	=1A
LD A,I		=ED,50+07
LD A,R		=ED,5F
LD I,A		=ED,47
LD R,A		=ED,4F
LD r3,(HL)	=46+r3
LD (HL),r0	=70+r0
LD r3,r0	=40+r3+r0
LD r3,n		=06+r3,n
LD r3,(ir+d)	=ir,46+r3,d
LD (ir+d),r0	=ir,70+r0,d
LD (HL),n	=36,n
LD (ir+d),n	=ir,36,d,n
LD (BC),A	=02
LD (DE),A	=12
LD (nn),A	=32,nlo,nhi
LD A,(nn)	=3A,nlo,nhi
;
; 16-bit load group
LD SP,HL	=F9
LD SP,ir	=ir,F9
LD dd4,nn	=01+dd4,nlo,nhi
LD ir,nn        =ir,21,nlo,nhi
LD HL,(nn)	=2A,nlo,nhi
LD dd4,(nn)	=ED,4B+dd4,nlo,nhi
LD ir,(nn)	=ir,2A,nlo,nhi
LD (nn),HL	=22,nlo,nhi
LD (nn),dd4	=ED,43+dd4,nlo,nhi
LD (nn),ir	=ir,22,nlo,nhi
PUSH qq4	=C5+qq4
PUSH ir		=ir,E5
POP qq4		=C1+qq4
POP ir		=ir,E1
;
; Exchange, block transfer and search group
EX DE,HL	=EB
EX AF,AF'	=08
EXX		=D9
EX (SP),HL	=E3
EX (SP),ir	=ir,E3
LDI		=ED,A0
LDIR		=ED,B0
LDD		=ED,A8
LDDR		=ED,B8
CPI		=ED,A1
CPIR		=ED,B1
CPD		=ED,A9
CPDR		=ED,B9
;
; 16-bit arithmetic group
ADD HL,dd4	=09+dd4
ADC HL,dd4	=ED,4A+dd4
SBC HL,dd4	=ED,42+dd4
ADD IX,pp4	=DD,09+pp4
ADD IY,rr4	=FD,09+rr4
INC dd4		=03+dd4
INC ir		=ir,23
DEC dd4		=0B+dd4
DEC ir		=ir,2B
;
; 8-bit arithmetic group
-ar		=ADD,ADC,SUB,SBC,AND,OR,XOR,CP  =80,88,90,98,A0,B0,A8,B8
ar A,r0		=ar+r0
ar A,(HL)	=ar+06
ar A,n		=ar+46,n
ar A,(ir+d)	=ir,ar+06,d
ar r0		=ar+r0
ar (HL)		=ar+06
ar n		=ar+46,n
ar (ir+d)	=ir,ar+06,d
-id             =INC,DEC			=04,05
id r3		=id+r3
id (HL)		=id+30
id (ir+d)	=ir,id+30,d
;
; General purpose arithmetic and cpu control groups
DAA		=27
CPL		=2F
NEG		=ED,44
CCF		=3F
SCF		=37
NOP		=00
HALT		=76
DI		=F3
EI		=FB
IM 0		=ED,46
IM 1		=ED,56
IM 2		=ED,5E
;
; Rotate and shift group	SLL is undocumented instruction
-sr		=RL,RLC,RR,RRC,SLA,SRA,SRL,SLL 	=10,00,18,08,20,28,38,30
sr r0		=CB,sr+r0
sr (HL)		=CB,sr+06
sr (ir+d)	=ir,CB,d,sr+06
RLCA		=07
RLA		=17
RRCA		=0F
RRA		=1F
RLD		=ED,6F
RRD		=ED,67
;
; Bit set, reset and test group
-bt		=BIT,SET,RES		 	=40,C0,80
bt b3,r0	=CB,bt+b3+r0
bt b3,(HL)	=CB,bt+06+b3
bt b3,(ir+d)	=ir,CB,d,bt+06+b3
;
; Jump group
; JP HL and JP ir added in addition to JP (HL) and JP (ir) to
; give option to use none standard format that is consistent 
; with a limitation in the current SCMonitor's disassembler.
JP HL		=E9
JP ir		=ir,E9
JP c3,nn	=c3+C2,nlo,nhi
JP nn		=C3,nlo,nhi
JR j3,rel	=20+j3,rel
JR rel		=18,rel
JP (HL)		=E9
JP (ir)		=ir,E9
DJNZ rel	=10,rel
;
; Call and return group
CALL c3,nn	=C4+c3,nlo,nhi
CALL nn		=CD,nlo,nhi
RET		=C9
RET c3		=C0+c3
RETI		=ED,4D
RETN		=ED,45
RST s3		=C7+s3
;
; Input and output group
IN r3,(C)	=ED,40+r3
IN A,(n)	=DB,n
INI		=ED,A2
INIR		=ED,B2
IND		=ED,AA
INDR		=ED,BA
OUT (C),r3	=ED,41+r3
OUT (n),A	=D3,n
OUTI		=ED,A3
OTIR		=ED,B3
OUTD		=ED,AB
OTDR		=ED,BB
;